
IDT / ICS HCSL CLOCK GENERATOR
13
ICS841602AGI REV. A JULY 10, 2008
ICS841602I
FEMTOCLOCKS CRYSTAL-TO-HCSL CLOCK GENERATOR
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in
Figure 6.
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power
dissipation, use the following equations which assume a 50
Ω load to ground.
The highest power dissipation occurs when V
DD is HIGH.
Power
= (V
DD_HIGH – VOUT
) * I
OUT,
since V
OUT
= I
OUT
* R
L
= (V
DD_HIGH – IOUT
* R
L) * IOUT
= (3.465V – 17mA * 50
Ω) * 17mA
Total Power Dissipation per output pair = 44.5mW
FIGURE 6. HCSL DRIVER CIRCUIT AND TERMINATION
VDD
VOUT
RL
50
Ω
IC
IOUT = 17mA
RREF =
475
Ω ± 1%